Savvychip Technologies

SoC Design Verification Engineer

  • 07 November, 2017
  • 2.5 - 5 years
  • Hyderabad, Bengaluru/Bangalore
  • Not disclosed


  • SoC
  • Verilog
  • Systemverilog
  • UVM
  • C++
  • Perl/Python
  • TCL
  • USB
  • PCIe
  • DDR
  • ARM Processor
  • Low power
  • Design
  • Verification
  • code/functional coverage

Job Description

Experience: 2.5 - 5 Years of Experience in SoC

1. Atleast 2 years of solid experience in verification of complex IPs or SoCs.
2. Expertise in SoC Verification using C++ and SV/UVM.
3. Expertise in Test Plan creation and Verification technologies like Code Coverage, functional Coverage and Assertions.
4. Expertise in working with ARM Processors.
5. Verification experience in any of the protocols like USB/ PCIe/ DDR or other complex protocols is highly desirable.
6. Good knowledge in gate-level simulation, and scripting languages like Perl/Python, TCL.
7. Excellent debugging and problem solving skills.
8. Experience in Low Power Verification is a added advantage.

Interested Professionals with minimum of 2.5 years of experience can apply.

Company Profile

Savvychip Technologies is a provider of IT and ITES lofty ending and strategic in process and proof aid providers to emerging technologies of Semiconductor, Embedded systems and Telecom.

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